Background: Implantable Medical Devices (IMDs), such as pacemakers, cardioverter defibrillators, neurostimulators etc., belong to a class of highly life-critical, resource-constrained, deeply embedded systems out there. Commercial IMDs primarily use MCUs to execute critical tasks. However, these MCUs, which are based on CPUs, do not scale well for next-generation workloads. FPGAs, on the other hand, are more suitable due to their inherent parallelism and reconfigurability. However, FPGAs are generally considered unsuited for these resource-constrained devices, in terms of energy consumption. This is a general misconception that this thesis challenges.
Thesis goal: Bust the myth that reconfigurable logic is incompatible with IMDs in terms of energy, performance, recertification effort etc. FPGA design tradeoffs compared to standard CPUs used nowadays is one aspect of this thesis work. Other aspects crucially include: i) the creation from scratch and/or adoption of cutting-edge new workloads, relevant for modern implants, such as deep-learning algorithms for pattern matching, spike sorting etc.; ii) exploration of hybrid system architectures with a mix of CPU, reconfigurable fabric (e.g., eFPGA) and perhaps even specialized CPUs (termed ASIPs); and iii) real-world considerations of such novel implant designs, including device certification aspects, fault tolerance, security and legal concerns.
Keywords: FPGA, IMD, neural implants
Prerequisites: FPGA, computer architecture, compilers, hardware design, machine/deep learning (basic), signal processing (basic)
Optionally: Python, C programming
Miscellaneous: This is topic offered jointly by the Erasmus Medical Center (Neuroscience department) and the Delft University of Technology (Quantum & Computer Engineering department). It capitalizes on the Convergence between the two universities and offers dual working locations (Rotterdam, Delft), access to extended resources and a truly interdisciplinary environment for conducting research.