Background: Implantable Medical Devices (IMDs), such as pacemakers, cardioverter defibrillators, neurostimulators etc., belong to a class of highly life-critical, resource-constrained, deeply embedded systems out there. Commercial IMDs primarily use MCUs to execute critical tasks. However, these MCUs, which are based on CPUs, do not scale well for next-generation workloads. FPGAs, on the other hand, are more suitable due to their inherent parallelism and reconfigurability. However, FPGAs are generally considered unsuited for these resource-constrained devices, in terms of energy consumption. This is a general misconception that this thesis challenges.
Thesis goal: Bust the myth that reconfigurable logic is incompatible with IMDs in terms of energy, performance, reconfiguration penalties etc. While FPGAs are our main focus, ASIPs (Application-Specific Instruction-set Processors) – that is, processors with instruction sets and microarchitectures tuned for special purposes – may also be a viable option for next-generation IMDs.
Keywords: FPGA, ASIP, IMD, neural implants
Prerequisites: FPGA, computer architecture, compilers, hardware design, signal processing (basic)
Optionally: Python, C programming
Miscellaneous: This is topic offered jointly by the Erasmus Medical Center (Neuroscience department) and the Delft University of Technology (Quantum & Computer Engineering department). It capitalizes on the Convergence between the two universities and offers dual working locations (Rotterdam, Delft), access to extended resources and a truly interdisciplinary environment for conducting research.